Simulator is writing multiple transition of the same signal at a same timestamp

get_var_name does not work in python 3.14

Invalid verilog generated on exhaustive switch statements with assert in default clause

Running Simulator inside asyncio eventloop and breaking out of `async for trigger: ...` causes runtime warning

Tracking issue for RFC 78: Internal I/O ports

"asynchronous generator is already running" when using simulator process on Python <= 3.12

If/Else for combinational assignment generates `always @*` that doesn't initialize

Reduce time in combinational cycle check by skipping duplicated checks

Discrepancy in `amaranth/sim/__init__.py` for `v0.5.7` (missing Period import)

Spaces in names generates invalid `RTLIL`