版本发布 3
## What's Changed * Revert ovxlib topk kernel modification by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/694 * Fixed typing error in gather test by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/695 * Update internal ovxlib to rel/1.2.14 by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/699 * Update timvx-overview by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/700 * Update timvx_overview.svg by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/701 * Fixed layernorm and logsoftmax ut error by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/702 * Update internal ovxlib to release/1.2.22 by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/706 **Full Changelog**: https://github.com/VeriSilicon/TIM-VX/compare/v1.2.6...v1.2.22
## What's Changed * Add NBG runner python binding by @Nullkooland in https://github.com/VeriSilicon/TIM-VX/pull/677 * Fixed layout infer bug when some op is not in op_vector_ by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/676 * Added opjson and bug fix for scatternd_onnx_v16 by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/678 * add unit test for conv2d by @antkillerfarm in https://github.com/VeriSilicon/TIM-VX/pull/681 * Added Asymmetric perchannel quantization support by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/682 * add a timeout for TIM-VX check by @zhongzhuonan in https://github.com/VeriSilicon/TIM-VX/pull/687 * add unit case for maxpool by @antkillerfarm in https://github.com/VeriSilicon/TIM-VX/pull/683 * Add some trigonometric ops by @antkillerfarm in https://github.com/VeriSilicon/TIM-VX/pull/689 * Updata internal ovxlib to rel1.2.6 by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/690 **Full Changelog**: https://github.com/VeriSilicon/TIM-VX/compare/v1.2.2...v1.2.6
## What's Changed * Added scalar type support by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/655 * Rebuild prebuild-sdk to adjust lower ubuntu env by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/658 * Refine UnitTest which have acc issue or un-support issue for SP by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/659 * Refine RNNCell/HardSwish/Reduce_sum ut by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/660 * add a case for resize bilinear by @chxin66 in https://github.com/VeriSilicon/TIM-VX/pull/662 * Fix the instance norm test input size bug in layout infer test by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/661 * Added 2 cases for stack by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/664 * fix slope shpae 1 crash issue by @chxin66 in https://github.com/VeriSilicon/TIM-VX/pull/663 * fix crash when eletwise inputs are different rank by @chxin66 in https://github.com/VeriSilicon/TIM-VX/pull/665 * fix const tensor align bug in AlignPermuteVectorForElementWise by @chxin66 in https://github.com/VeriSilicon/TIM-VX/pull/666 * fix layoutinfer crash when logical op inputs are different rank by @chxin66 in https://github.com/VeriSilicon/TIM-VX/pull/667 * Add uid() api for class operation by @zhengzhouheng in https://github.com/VeriSilicon/TIM-VX/pull/668 * Refine layout inference by @Nullkooland in https://github.com/VeriSilicon/TIM-VX/pull/671 * Add json third party when support node trace db by @zhengzhouheng in https://github.com/VeriSilicon/TIM-VX/pull/670 * Fixed typing error and added missed opheader by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/673 * Add license declaration of third party by @zhengzhouheng in https://github.com/VeriSilicon/TIM-VX/pull/672 * Update internal ovxlib to rel/1.2.2 by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/674 * Update ops which has addings in internal by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/675 * Fixed unreasonable type of parameter in broadcast by @chenfeiyue-cfy in https://github.com/VeriSilicon/TIM-VX/pull/505 **Full Changelog**: https://github.com/VeriSilicon/TIM-VX/compare/v1.1.88...v1.2.2