6.18: Add patch to read AMD CPU/TSC frequency from MSR
> AMD's Zen CPUs (17h and newer) have an MSR that provides the CPU/TSC
frequency directly, instead of calibrating it against the PIT.
>
> My understanding of the PIT calibration code is that it loops between
two and three times and takes 10ms (or 50ms) each loop, taking at least
20ms total to calibrate. This patch skips that calibration time.
>
> Through experimentation, this patch seems to save approximately 30ms on
boot time for Zen 4 (19h) CPUs (Ryzen 7 7800X3D & Ryzen 7 7840U).
>
> This has also been tested to not interfere with KVM guests running a
custom TSC frequency.
I had submitted a similar patch [upstream here](https://lore.kernel.org/all/20250813112020.345622-1-s.horvath@outlook.com.au/), however I am not sure if this will cause any issues, and I was told "Not sure if that is worth it" by one of the maintainers. This current version of the patch was also [submitted here](https://lore.kernel.org/all/20250819031121.148616-1-s.horvath@outlook.com.au/).
If there are any issues, Linux should automatically switch over to the HPET without the user noticing (this can also be forced with `tsc=unstable`). Alternatively, removing `setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);` will allow linux to use the MSR timing for early in the boot process and keep this ~30ms speedup, but recalibrate later in the boot process.
I've also only applied this to the 6.18rcs, to limit the exposure of any issues.
合并状态:未合并 关闭于 2026-01-05 5 条评论