Error while C synthesis on Vitis HLS for Arty A7-35T

I have encountered an error when running C synthesis on the Arty A7-35T. I have reinstalled board files, but it does not fix this issue. ``` Starting C synthesis ... F:/Xilinx/Vitis/2020.1/bin/vitis_hls.bat F:/basic_blink_hls/solution1/csynth.tcl INFO: [HLS 200-10] Running 'F:/Xilinx/Vitis/2020.1/bin/unwrapped/win64.o/vitis_hls.exe' INFO: [HLS 200-10] For user 'irfan' on host 'dr-irfan' (Windows NT_amd64 version 6.2) on Thu Feb 09 19:55:56 +0530 2023 INFO: [HLS 200-10] In directory 'F:/' Sourcing Tcl script 'F:/basic_blink_hls/solution1/csynth.tcl' INFO: [HLS 200-10] Opening project 'F:/basic_blink_hls'. INFO: [HLS 200-10] Adding design file 'basic_blink_hls/led_blink.c' to the project INFO: [HLS 200-10] Opening solution 'F:/basic_blink_hls/solution1'. INFO: [SYN 201-201] Setting up clock 'default' with a period of 10ns. ERROR: [HLS 200-1023] Part 'xc7a35ticsg324-1L-i' is not installed. command 'ap_source' returned error code while executing "source F:/basic_blink_hls/solution1/csynth.tcl" invoked from within "hls::main F:/basic_blink_hls/solution1/csynth.tcl" ("uplevel" body line 1) invoked from within "uplevel 1 hls::main {*}$args" (procedure "hls_proc" line 5) invoked from within "hls_proc $argv" Finished C synthesis. ```