# ============================================================================ #
# Copyright (c) 2022 - 2026 NVIDIA Corporation & Affiliates.                   #
# All rights reserved.                                                         #
#                                                                              #
# This source code and the accompanying materials are made available under     #
# the terms of the Apache License 2.0 which accompanies this distribution.     #
# ============================================================================ #

name: opt-test
description: "Compiler Optimization Test Target"

target-arguments:
  - key: option
    required: false
    type: option-flags
    help-string: "Specify the target options as a comma-separated list.\nSupported options are 'dep-analysis, 'fp32', 'fp64', 'qpp'.\nFor example, the 'dep-analysis,fp32' option combination will activate single-precision simulation with the dep-analysis passes. Not all option combinations are supported."

configuration-matrix:
  - name: dep-analysis-fp32
    option-flags: [dep-analysis, fp32]
    default: true
    config:
      nvqir-simulation-backend: custatevec-fp32
      preprocessor-defines: ["-D CUDAQ_SIMULATION_SCALAR_FP32"]
      target-pass-pipeline: "func.func(unwind-lowering,canonicalize),lambda-lifting,func.func(memtoreg{quantum=0},canonicalize),apply-op-specialization,kernel-execution,aggressive-inlining,func.func(quake-add-metadata,constant-propagation,lift-array-alloc),globalize-array-values,canonicalize,get-concrete-matrix,device-code-loader{use-quake=1},func.func(canonicalize,cse,add-dealloc,combine-quantum-alloc,canonicalize,factor-quantum-alloc,dqe,memtoreg),canonicalize,cse,add-wireset,func.func(assign-wire-indices),dep-analysis,func.func(regtomem),symbol-dce"
  - name: dep-analysis-fp64
    option-flags: [dep-analysis, fp64]
    config:
      nvqir-simulation-backend: custatevec-fp64
      preprocessor-defines: ["-D CUDAQ_SIMULATION_SCALAR_FP64"]
      target-pass-pipeline: "func.func(unwind-lowering,canonicalize),lambda-lifting,func.func(memtoreg{quantum=0},canonicalize),apply-op-specialization,kernel-execution,aggressive-inlining,func.func(quake-add-metadata,constant-propagation,lift-array-alloc),globalize-array-values,canonicalize,get-concrete-matrix,device-code-loader{use-quake=1},func.func(canonicalize,cse,add-dealloc,combine-quantum-alloc,canonicalize,factor-quantum-alloc,dqe,memtoreg),canonicalize,cse,add-wireset,func.func(assign-wire-indices),dep-analysis,func.func(regtomem),symbol-dce"
  - name: dep-analysis-qpp
    option-flags: [dep-analysis, qpp]
    config:
      nvqir-simulation-backend: qpp
      preprocessor-defines: ["-D CUDAQ_SIMULATION_SCALAR_FP64"]
      target-pass-pipeline: "func.func(unwind-lowering,canonicalize),lambda-lifting,func.func(memtoreg{quantum=0},canonicalize),apply-op-specialization,kernel-execution,aggressive-inlining,func.func(quake-add-metadata,constant-propagation,lift-array-alloc),globalize-array-values,canonicalize,get-concrete-matrix,device-code-loader{use-quake=1},func.func(canonicalize,cse,add-dealloc,combine-quantum-alloc,canonicalize,factor-quantum-alloc,dqe,memtoreg),canonicalize,cse,add-wireset,func.func(assign-wire-indices),dep-analysis,func.func(regtomem),symbol-dce"
