# Analog Devices MAX32xxx MCU family

# Copyright (c) 2023-2026 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0

config SOC_FAMILY_MAX32
	select BUILD_OUTPUT_HEX
	select SOC_EARLY_INIT_HOOK
	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE

config SOC_FAMILY_MAX32_M33
	select ARM
	select CPU_CORTEX_M_HAS_SYSTICK
	select CPU_HAS_ARM_MPU
	select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
	select CPU_HAS_FPU
	select CPU_HAS_ICACHE
	select CLOCK_CONTROL
	select CPU_CORTEX_M33
	select ARM_TRUSTZONE_M
	select CPU_HAS_ARM_SAU
	select ARMV8_M_DSP
	select HAS_PM
	select PM_STATE_SET_IRQ_UNLOCKED

config SOC_FAMILY_MAX32_M4
	select ARM
	select CPU_CORTEX_M4
	select CPU_CORTEX_M_HAS_SYSTICK
	select CPU_HAS_ARM_MPU
	select CPU_HAS_FPU
	select CPU_HAS_ICACHE
	select HAS_PM
	select PM_STATE_SET_IRQ_UNLOCKED
	select CLOCK_CONTROL

config SOC_FAMILY_MAX32_RV32
	select RISCV
	select RISCV_ISA_RV32I
	select RISCV_ISA_EXT_M
	select RISCV_ISA_EXT_ZICSR
	select RISCV_ISA_EXT_ZIFENCEI
	select ATOMIC_OPERATIONS_C
	select INCLUDE_RESET_VECTOR
	select ARCH_HAS_RAMFUNC_SUPPORT
	select HAS_FLASH_LOAD_OFFSET
	select CLOCK_CONTROL
	imply XIP

config SOC_MAX32657
	select SOC_FAMILY_MAX32_ERRATA_30282

if SOC_FAMILY_MAX32

config SOC_FAMILY_MAX32_HALT_AFTER_BOOTLOADER_SUPPORT
	bool "Halt after bootloader integration for JLink"
	default y if !TRUSTED_EXECUTION_NONSECURE
	select SOC_EARLY_RESET_HOOK
	depends on SOC_FAMILY_MAX32_M4 || SOC_FAMILY_MAX32_M33
	help
	  To support properly halting after a reset when using JLink to flash
	  the MAX32 SoC, inject the small dummy read into our early reset
	  code to trigger the set hardware breakpoint

config MAX32_ON_ENTER_CPU_IDLE_HOOK
	bool "CPU idle hook enable"
	default y if !PM
	imply ARM_ON_ENTER_CPU_IDLE_HOOK
	depends on ARM
	help
	  Enables a hook (z_arm_on_enter_cpu_idle()) that is called when
	  the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
	  If needed, this hook can be used to prevent the CPU from actually
	  entering sleep by skipping the WFE/WFI instruction.

config SOC_FAMILY_MAX32_ERRATA_30282
	bool
	help
	  Select if the SoC is affected by errata 30282, which may cause
	  the system to HardFault if the instruction cache is enabled
	  when entering standby mode.

config MAX32_SECONDARY_RV32
	bool "Secondary RISC-V core enable"
	depends on DT_HAS_ADI_MAX32_RV32_ENABLED

config MAX32_STANDBY_DELAY
	int "Prevent standby on boot for given ms"
	depends on PM
	default 1000
	help
	  Prevents the system from entering standby mode for a give number of ms.
	  This is intended to prevent debug lockout when using power management.

if MAX32_SECONDARY_RV32

config MAX32_SECONDARY_RV32_STARTUP_DELAY
	int "Secondary RISC-V core startup delay (in cycles)"
	default 0

endif # MAX32_SECONDARY_RV32

config MAX32_SECONDARY_M4
	bool "Secondary M4 core enable"
	depends on DT_HAS_ADI_MAX32_M4F_CPU1_ENABLED

if MAX32_SECONDARY_M4

config MAX32_SECONDARY_M4_STARTUP_DELAY
	int "Secondary M4 core startup delay (in cycles)"
	default 0

endif # MAX32_SECONDARY_M4

config BUILD_WITH_TFM
	default y if TRUSTED_EXECUTION_NONSECURE
	help
	  Auto set WITH_TFM for a Non-Secure version of the board,

rsource "*/Kconfig"

endif # SOC_FAMILY_MAX32
