define hidden <2 x i32> @impl(<2 x i32> %"12") #0 {
  %"56" = alloca <2 x i32>, align 8, addrspace(5)
  %"57" = alloca <2 x i32>, align 8, addrspace(5)
  %"58" = alloca i32, align 4, addrspace(5)
  %"59" = alloca i32, align 4, addrspace(5)
  br label %1

1:                                                ; preds = %0
  br label %"53"

"53":                                             ; preds = %1
  %"47" = extractelement <2 x i32> %"12", i8 0
  store i32 %"47", ptr addrspace(5) %"58", align 4
  %"48" = extractelement <2 x i32> %"12", i8 1
  store i32 %"48", ptr addrspace(5) %"59", align 4
  %2 = load i32, ptr addrspace(5) %"58", align 4
  %3 = load i32, ptr addrspace(5) %"59", align 4
  %"62" = add i32 %2, %3
  store i32 %"62", ptr addrspace(5) %"59", align 4
  %4 = load i32, ptr addrspace(5) %"59", align 4
  %5 = load <2 x i32>, ptr addrspace(5) %"57", align 8
  %"66" = insertelement <2 x i32> %5, i32 %4, i8 0
  store <2 x i32> %"66", ptr addrspace(5) %"57", align 8
  %6 = load i32, ptr addrspace(5) %"59", align 4
  %7 = load <2 x i32>, ptr addrspace(5) %"57", align 8
  %"69" = insertelement <2 x i32> %7, i32 %6, i8 1
  store <2 x i32> %"69", ptr addrspace(5) %"57", align 8
  %8 = load <2 x i32>, ptr addrspace(5) %"57", align 8
  %"52" = extractelement <2 x i32> %8, i8 1
  %9 = load <2 x i32>, ptr addrspace(5) %"57", align 8
  %"72" = insertelement <2 x i32> %9, i32 %"52", i8 0
  store <2 x i32> %"72", ptr addrspace(5) %"57", align 8
  %10 = load <2 x i32>, ptr addrspace(5) %"57", align 8
  store <2 x i32> %10, ptr addrspace(5) %"56", align 8
  %11 = load <2 x i32>, ptr addrspace(5) %"56", align 8
  ret <2 x i32> %11
}

define amdgpu_kernel void @vector(ptr addrspace(4) byref(i64) %"76", ptr addrspace(4) byref(i64) %"77") #1 {
  %"78" = alloca i64, align 8, addrspace(5)
  %"79" = alloca i64, align 8, addrspace(5)
  %"80" = alloca <2 x i32>, align 8, addrspace(5)
  %"81" = alloca i32, align 4, addrspace(5)
  %"82" = alloca i32, align 4, addrspace(5)
  %"83" = alloca i64, align 8, addrspace(5)
  br label %1

1:                                                ; preds = %0
  br label %"54"

"54":                                             ; preds = %1
  %2 = load i64, ptr addrspace(4) %"76", align 8
  store i64 %2, ptr addrspace(5) %"78", align 8
  %3 = load i64, ptr addrspace(4) %"77", align 8
  store i64 %3, ptr addrspace(5) %"79", align 8
  %4 = load i64, ptr addrspace(5) %"78", align 8
  %"94" = inttoptr i64 %4 to ptr
  %5 = load <2 x i32>, ptr %"94", align 8
  store <2 x i32> %5, ptr addrspace(5) %"80", align 8
  %6 = load <2 x i32>, ptr addrspace(5) %"80", align 8
  %"88" = call <2 x i32> @impl(<2 x i32> %6)
  store <2 x i32> %"88", ptr addrspace(5) %"80", align 8
  br label %"55"

"55":                                             ; preds = %"54"
  %7 = load <2 x i32>, ptr addrspace(5) %"80", align 8
  %"95" = bitcast <2 x i32> %7 to i64
  store i64 %"95", ptr addrspace(5) %"83", align 8
  %8 = load i64, ptr addrspace(5) %"79", align 8
  %9 = load <2 x i32>, ptr addrspace(5) %"80", align 8
  %"96" = inttoptr i64 %8 to ptr
  store <2 x i32> %9, ptr %"96", align 8
  ret void
}

attributes #0 = { "amdgpu-ieee"="false" "amdgpu-unsafe-fp-atomics"="true" "denormal-fp-math"="dynamic" "denormal-fp-math-f32"="dynamic" "no-trapping-math"="true" "target-features"="+wavefrontsize32,-wavefrontsize64,+cumode,+precise-memory" "uniform-work-group-size"="true" }
attributes #1 = { "amdgpu-ieee"="false" "amdgpu-unsafe-fp-atomics"="true" "denormal-fp-math"="preserve-sign" "denormal-fp-math-f32"="preserve-sign" "no-trapping-math"="true" "target-features"="+wavefrontsize32,-wavefrontsize64,+cumode,+precise-memory" "uniform-work-group-size"="true" }
