#ifndef ASM_RISCV64_CPU_H
#define ASM_RISCV64_CPU_H

/*
    Copyright (c) 2026, The AROS Development Team. All rights reserved.
    $Id$

    Desc: assembler-level specific definitions for 64bit riscv CPUs
    Lang: english
*/

/* The riscv definitions (barriers, hints and CSR accessors) are
   width-agnostic */
#include <asm/riscv/cpu.h>

#endif /* ASM_RISCV64_CPU_H */
